Patchwork [PATCHv5,08/20] PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions

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Submitter Zhiqiang Hou
Date April 12, 2019, 8:36 a.m.
Message ID <20190412083635.33626-9-Zhiqiang.Hou@nxp.com>
Download mbox | patch
Permalink /patch/771323/
State New
Headers show

Comments

Zhiqiang Hou - April 12, 2019, 8:36 a.m.
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>


The inbound windows have independent register set against outbound windows.
This patch change the MEM inbound window to the first one.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>

Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>

---
V5:
 - Corrected and retouched the subject and changelog.

 drivers/pci/controller/pcie-mobiveil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.17.1

Patch

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c

index df71c11b4810..e88afc792a5c 100644

--- a/drivers/pci/controller/pcie-mobiveil.c

+++ b/drivers/pci/controller/pcie-mobiveil.c

@@ -616,7 +616,7 @@  static int mobiveil_host_init(struct mobiveil_pcie *pcie)

 			   CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res));
 
 	/* memory inbound translation window */
-	program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);

+	program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);

 
 	/* Get the I/O and memory ranges from DT */
 	resource_list_for_each_entry(win, &pcie->resources) {