Patchwork [28/30] dt-bindings: pci: tegra: Document nvidia,rst-gpio optional prop

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Submitter Manikanta Maddireddy
Date April 11, 2019, 5:03 p.m.
Message ID <20190411170355.6882-29-mmaddireddy@nvidia.com>
Download mbox | patch
Permalink /patch/770867/
State New
Headers show

Comments

Manikanta Maddireddy - April 11, 2019, 5:03 p.m.
Document "nvidia,rst-gpio" optional property which supports GPIO based
PERST# signal.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
 Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 3 +++
 1 file changed, 3 insertions(+)
Thierry Reding - April 15, 2019, 2:20 p.m.
On Thu, Apr 11, 2019 at 10:33:53PM +0530, Manikanta Maddireddy wrote:
> Document "nvidia,rst-gpio" optional property which supports GPIO based
> PERST# signal.
> 
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
>  Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> index dca8393b86d1..23928fd59538 100644
> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> @@ -75,6 +75,8 @@ Optional properties:
>    Pass pinctrl phandle to allow driver bring PCIe IO out of DPD state.
>  - nvidia,plat-gpios: A list of platform specific gpios which controls
>    endpoint's internal regulator or PCIe logic.
> +- nvidia,rst-gpio: If GPIO is used as PERST# signal instead of available
> +  SFIO, add this property with phandle to GPIO controller and GPIO number.

GPIO properties are pretty much standardized, so this should really be
called just "reset-gpio".

Also it looks like this is documented in the wrong place. In the example
below you set this property for the root port, that is inside a child
node of the PCI controller, but if I understand correctly, and it's hard
to say from the context, the above is documented as part of the
properties of the host bridge node.

Thierry

>  
>  Required properties on Tegra124 and later (deprecated):
>  - phys: Must contain an entry for each entry in phy-names.
> @@ -671,6 +673,7 @@ Board DTS:
>  
>  		pci@1,0 {
>  			nvidia,num-lanes = <4>;
> +			nvidia,rst-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(A, 3) 0>;
>  			status = "okay";
>  		};
>  
> -- 
> 2.17.1
>
Manikanta Maddireddy - April 15, 2019, 6:01 p.m.
On 15-Apr-19 7:50 PM, Thierry Reding wrote:
> On Thu, Apr 11, 2019 at 10:33:53PM +0530, Manikanta Maddireddy wrote:
>> Document "nvidia,rst-gpio" optional property which supports GPIO based
>> PERST# signal.
>>
>> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
>> ---
>>  Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
>> index dca8393b86d1..23928fd59538 100644
>> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
>> @@ -75,6 +75,8 @@ Optional properties:
>>    Pass pinctrl phandle to allow driver bring PCIe IO out of DPD state.
>>  - nvidia,plat-gpios: A list of platform specific gpios which controls
>>    endpoint's internal regulator or PCIe logic.
>> +- nvidia,rst-gpio: If GPIO is used as PERST# signal instead of available
>> +  SFIO, add this property with phandle to GPIO controller and GPIO number.
> GPIO properties are pretty much standardized, so this should really be
> called just "reset-gpio".
>
> Also it looks like this is documented in the wrong place. In the example
> below you set this property for the root port, that is inside a child
> node of the PCI controller, but if I understand correctly, and it's hard
> to say from the context, the above is documented as part of the
> properties of the host bridge node.
>
> Thierry
I will correct this in V2.

Manikanta
>>  
>>  Required properties on Tegra124 and later (deprecated):
>>  - phys: Must contain an entry for each entry in phy-names.
>> @@ -671,6 +673,7 @@ Board DTS:
>>  
>>  		pci@1,0 {
>>  			nvidia,num-lanes = <4>;
>> +			nvidia,rst-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(A, 3) 0>;
>>  			status = "okay";
>>  		};
>>  
>> -- 
>> 2.17.1
>>

Patch

diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index dca8393b86d1..23928fd59538 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -75,6 +75,8 @@  Optional properties:
   Pass pinctrl phandle to allow driver bring PCIe IO out of DPD state.
 - nvidia,plat-gpios: A list of platform specific gpios which controls
   endpoint's internal regulator or PCIe logic.
+- nvidia,rst-gpio: If GPIO is used as PERST# signal instead of available
+  SFIO, add this property with phandle to GPIO controller and GPIO number.
 
 Required properties on Tegra124 and later (deprecated):
 - phys: Must contain an entry for each entry in phy-names.
@@ -671,6 +673,7 @@  Board DTS:
 
 		pci@1,0 {
 			nvidia,num-lanes = <4>;
+			nvidia,rst-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(A, 3) 0>;
 			status = "okay";
 		};