Patchwork [v2,3/6] EDAC/amd64: Use a macro for iterating over Unified Memory Controllers

login
register
mail settings
Submitter Yazen Ghannam
Date Feb. 26, 2019, 5:25 p.m.
Message ID <20190226172532.12924-3-Yazen.Ghannam@amd.com>
Download mbox | patch
Permalink /patch/736285/
State New
Headers show

Comments

Yazen Ghannam - Feb. 26, 2019, 5:25 p.m.
From: Yazen Ghannam <yazen.ghannam@amd.com>

Define and use a macro for looping over the number of Unified Memory
Controllers.

No functional change.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20190219202536.15462-2-Yazen.Ghannam@amd.com

v1->v2:
* New in V2. Please see comment on Patch 2 V1 at link above.

 drivers/edac/amd64_edac.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)
Borislav Petkov - Feb. 26, 2019, 9:53 p.m.
On Tue, Feb 26, 2019 at 05:25:46PM +0000, Ghannam, Yazen wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
> 
> Define and use a macro for looping over the number of Unified Memory
> Controllers.
> 
> No functional change.
> 
> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> ---
> Link:
> https://lkml.kernel.org/r/20190219202536.15462-2-Yazen.Ghannam@amd.com
> 
> v1->v2:
> * New in V2. Please see comment on Patch 2 V1 at link above.
> 
>  drivers/edac/amd64_edac.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 0038fcb0b010..c82aafb7246a 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -449,6 +449,9 @@ static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct,
>  #define for_each_chip_select_mask(i, dct, pvt) \
>  	for (i = 0; i < pvt->csels[dct].m_cnt; i++)
>  
> +#define for_each_umc(i) \
> +	for (i = 0; i < num_umcs; i++)
> +
>  /*
>   * @input_addr is an InputAddr associated with the node given by mci. Return the
>   * csrow that input_addr maps to, or -1 on failure (no csrow claims input_addr).
> @@ -722,7 +725,7 @@ static unsigned long determine_edac_cap(struct amd64_pvt *pvt)
>  	if (pvt->umc) {
>  		u8 i, umc_en_mask = 0, dimm_ecc_en_mask = 0;
>  
> -		for (i = 0; i < num_umcs; i++) {
> +		for_each_umc(i) {

Hmm, maybe I didn't express myself as clearly as I should have, before.
Sorry about that.

But if you sort the patches this way:

1. Add for_each_umc() and convert code to use it
2. add num_umcs and convert for_each_umc() to use it

You won't have to touch the loops twice in patches 2 and 3 and your
diffstat will be a lot smaller.

Makes sense?

Thx.
Yazen Ghannam - Feb. 27, 2019, 2:50 p.m.
> -----Original Message-----

> From: linux-edac-owner@vger.kernel.org <linux-edac-owner@vger.kernel.org> On Behalf Of Borislav Petkov

> Sent: Tuesday, February 26, 2019 3:53 PM

> To: Ghannam, Yazen <Yazen.Ghannam@amd.com>

> Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org

> Subject: Re: [PATCH v2 3/6] EDAC/amd64: Use a macro for iterating over Unified Memory Controllers

> 

> On Tue, Feb 26, 2019 at 05:25:46PM +0000, Ghannam, Yazen wrote:

> > From: Yazen Ghannam <yazen.ghannam@amd.com>

> >

> > Define and use a macro for looping over the number of Unified Memory

> > Controllers.

> >

> > No functional change.

> >

> > Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>

> > ---

> > Link:

> > https://lkml.kernel.org/r/20190219202536.15462-2-Yazen.Ghannam@amd.com

> >

> > v1->v2:

> > * New in V2. Please see comment on Patch 2 V1 at link above.

> >

> >  drivers/edac/amd64_edac.c | 17 ++++++++++-------

> >  1 file changed, 10 insertions(+), 7 deletions(-)

> >

> > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c

> > index 0038fcb0b010..c82aafb7246a 100644

> > --- a/drivers/edac/amd64_edac.c

> > +++ b/drivers/edac/amd64_edac.c

> > @@ -449,6 +449,9 @@ static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct,

> >  #define for_each_chip_select_mask(i, dct, pvt) \

> >  	for (i = 0; i < pvt->csels[dct].m_cnt; i++)

> >

> > +#define for_each_umc(i) \

> > +	for (i = 0; i < num_umcs; i++)

> > +

> >  /*

> >   * @input_addr is an InputAddr associated with the node given by mci. Return the

> >   * csrow that input_addr maps to, or -1 on failure (no csrow claims input_addr).

> > @@ -722,7 +725,7 @@ static unsigned long determine_edac_cap(struct amd64_pvt *pvt)

> >  	if (pvt->umc) {

> >  		u8 i, umc_en_mask = 0, dimm_ecc_en_mask = 0;

> >

> > -		for (i = 0; i < num_umcs; i++) {

> > +		for_each_umc(i) {

> 

> Hmm, maybe I didn't express myself as clearly as I should have, before.

> Sorry about that.

> 

> But if you sort the patches this way:

> 

> 1. Add for_each_umc() and convert code to use it

> 2. add num_umcs and convert for_each_umc() to use it

> 

> You won't have to touch the loops twice in patches 2 and 3 and your

> diffstat will be a lot smaller.

> 

> Makes sense?

> 


Yep, makes sense.

I can send out another version soon. Do you have any comments on the other patches?

Thanks,
Yazen

Patch

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 0038fcb0b010..c82aafb7246a 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -449,6 +449,9 @@  static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct,
 #define for_each_chip_select_mask(i, dct, pvt) \
 	for (i = 0; i < pvt->csels[dct].m_cnt; i++)
 
+#define for_each_umc(i) \
+	for (i = 0; i < num_umcs; i++)
+
 /*
  * @input_addr is an InputAddr associated with the node given by mci. Return the
  * csrow that input_addr maps to, or -1 on failure (no csrow claims input_addr).
@@ -722,7 +725,7 @@  static unsigned long determine_edac_cap(struct amd64_pvt *pvt)
 	if (pvt->umc) {
 		u8 i, umc_en_mask = 0, dimm_ecc_en_mask = 0;
 
-		for (i = 0; i < num_umcs; i++) {
+		for_each_umc(i) {
 			if (!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT))
 				continue;
 
@@ -811,7 +814,7 @@  static void __dump_misc_regs_df(struct amd64_pvt *pvt)
 	struct amd64_umc *umc;
 	u32 i, tmp, umc_base;
 
-	for (i = 0; i < num_umcs; i++) {
+	for_each_umc(i) {
 		umc_base = get_umc_base(i);
 		umc = &pvt->umc[i];
 
@@ -1388,7 +1391,7 @@  static int f17_early_channel_count(struct amd64_pvt *pvt)
 	int i, channels = 0;
 
 	/* SDP Control bit 31 (SdpInit) is clear for unused UMC channels */
-	for (i = 0; i < num_umcs; i++)
+	for_each_umc(i)
 		channels += !!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT);
 
 	amd64_info("MCT channel count: %d\n", channels);
@@ -2604,7 +2607,7 @@  static void determine_ecc_sym_sz(struct amd64_pvt *pvt)
 	if (pvt->umc) {
 		u8 i;
 
-		for (i = 0; i < num_umcs; i++) {
+		for_each_umc(i) {
 			/* Check enabled channels only: */
 			if ((pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) &&
 			    (pvt->umc[i].ecc_ctrl & BIT(7))) {
@@ -2640,7 +2643,7 @@  static void __read_mc_regs_df(struct amd64_pvt *pvt)
 	u32 i, umc_base;
 
 	/* Read registers from each UMC */
-	for (i = 0; i < num_umcs; i++) {
+	for_each_umc(i) {
 
 		umc_base = get_umc_base(i);
 		umc = &pvt->umc[i];
@@ -3053,7 +3056,7 @@  static bool ecc_enabled(struct pci_dev *F3, u16 nid)
 	if (boot_cpu_data.x86 >= 0x17) {
 		u8 umc_en_mask = 0, ecc_en_mask = 0;
 
-		for (i = 0; i < num_umcs; i++) {
+		for_each_umc(i) {
 			u32 base = get_umc_base(i);
 
 			/* Only check enabled UMCs. */
@@ -3106,7 +3109,7 @@  f17h_determine_edac_ctl_cap(struct mem_ctl_info *mci, struct amd64_pvt *pvt)
 {
 	u8 i, ecc_en = 1, cpk_en = 1;
 
-	for (i = 0; i < num_umcs; i++) {
+	for_each_umc(i) {
 		if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) {
 			ecc_en &= !!(pvt->umc[i].umc_cap_hi & UMC_ECC_ENABLED);
 			cpk_en &= !!(pvt->umc[i].umc_cap_hi & UMC_ECC_CHIPKILL_CAP);