Patchwork [5/8,v4] dma: k3dma: Add support for dma-channel-mask

login
register
mail settings
Submitter John Stultz
Date Jan. 16, 2019, 5:10 p.m.
Message ID <1547658629-25378-6-git-send-email-john.stultz@linaro.org>
Download mbox | patch
Permalink /patch/701589/
State New
Headers show

Comments

John Stultz - Jan. 16, 2019, 5:10 p.m.
From: Li Yu <liyu65@hisilicon.com>

Add dma-channel-mask as a property for k3dma, it defines
available dma channels which a non-secure mode driver can use.

One sample usage of this is in Hi3660 SoC. DMA channel 0 is
reserved to lpm3, which is a coprocessor for power management. So
as a result, any request in kernel (which runs on main processor
and in non-secure mode) should start from at least channel 1.

Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Tanglei Han <hantanglei@huawei.com>
Cc: Zhuangluan Su <suzhuangluan@hisilicon.com>
Cc: Ryan Grachek <ryan@edited.us>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: dmaengine@vger.kernel.org
Signed-off-by: Li Yu <liyu65@hisilicon.com>
[jstultz: Reworked to use a channel mask]
Signed-off-by: John Stultz <john.stultz@linaro.org>
---
v3: Rename to hisi-dma-avail-chan
v4: Rename to dma-channel-mask
---
 drivers/dma/k3dma.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)
Manivannan Sadhasivam - Jan. 17, 2019, 5:14 p.m.
On Wed, Jan 16, 2019 at 09:10:26AM -0800, John Stultz wrote:
> From: Li Yu <liyu65@hisilicon.com>
> 
> Add dma-channel-mask as a property for k3dma, it defines
> available dma channels which a non-secure mode driver can use.
> 
> One sample usage of this is in Hi3660 SoC. DMA channel 0 is
> reserved to lpm3, which is a coprocessor for power management. So
> as a result, any request in kernel (which runs on main processor
> and in non-secure mode) should start from at least channel 1.
> 
> Cc: Dan Williams <dan.j.williams@intel.com>
> Cc: Vinod Koul <vkoul@kernel.org>
> Cc: Tanglei Han <hantanglei@huawei.com>
> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com>
> Cc: Ryan Grachek <ryan@edited.us>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Cc: Guodong Xu <guodong.xu@linaro.org>
> Cc: dmaengine@vger.kernel.org
> Signed-off-by: Li Yu <liyu65@hisilicon.com>
> [jstultz: Reworked to use a channel mask]
> Signed-off-by: John Stultz <john.stultz@linaro.org>
> ---
> v3: Rename to hisi-dma-avail-chan
> v4: Rename to dma-channel-mask
> ---
>  drivers/dma/k3dma.c | 20 +++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
> index b2060bf..ed19b1f 100644
> --- a/drivers/dma/k3dma.c
> +++ b/drivers/dma/k3dma.c
> @@ -111,6 +111,7 @@ struct k3_dma_dev {
>  	struct dma_pool		*pool;
>  	u32			dma_channels;
>  	u32			dma_requests;
> +	u32			dma_channel_mask;
>  	unsigned int		irq;
>  };
>  
> @@ -318,6 +319,9 @@ static void k3_dma_tasklet(unsigned long arg)
>  	/* check new channel request in d->chan_pending */
>  	spin_lock_irq(&d->lock);
>  	for (pch = 0; pch < d->dma_channels; pch++) {
> +		if (!(d->dma_channel_mask & (1<<pch)))
> +			continue;
> +

As per my comment in bindings patch, the code here gets the assumption
that we are skipping the channels which are not masked. Either the
property should be named as "dma-avail-chan" or "dma_channel_mask" should
have the bit mask of channels which needs to be masked. Then the code will
be,

/* Skip the channels which are masked */
if ((d->dma_channel_mask) & BIT(pch))
	continue;

PS: Use BIT() macro where applicable.

Thanks,
Mani

>  		p = &d->phy[pch];
>  
>  		if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
> @@ -335,6 +339,9 @@ static void k3_dma_tasklet(unsigned long arg)
>  	spin_unlock_irq(&d->lock);
>  
>  	for (pch = 0; pch < d->dma_channels; pch++) {
> +		if (!(d->dma_channel_mask & (1<<pch)))
> +			continue;
> +
>  		if (pch_alloc & (1 << pch)) {
>  			p = &d->phy[pch];
>  			c = p->vchan;
> @@ -855,6 +862,13 @@ static int k3_dma_probe(struct platform_device *op)
>  				"dma-channels", &d->dma_channels);
>  		of_property_read_u32((&op->dev)->of_node,
>  				"dma-requests", &d->dma_requests);
> +		ret = of_property_read_u32((&op->dev)->of_node,
> +				"dma-channel-mask", &d->dma_channel_mask);
> +		if (ret) {
> +			dev_warn(&op->dev,
> +				 "dma-channel-mask doesn't exist, considering all as available.\n");
> +			d->dma_channel_mask = (u32)~0UL;
> +		}
>  	}
>  
>  	if (!(soc_data->flags & K3_FLAG_NOCLK)) {
> @@ -886,8 +900,12 @@ static int k3_dma_probe(struct platform_device *op)
>  		return -ENOMEM;
>  
>  	for (i = 0; i < d->dma_channels; i++) {
> -		struct k3_dma_phy *p = &d->phy[i];
> +		struct k3_dma_phy *p;
> +
> +		if (!(d->dma_channel_mask & (1<<i)))
> +			continue;
>  
> +		p = &d->phy[i];
>  		p->idx = i;
>  		p->base = d->base + i * 0x40;
>  	}
> -- 
> 2.7.4
>
John Stultz - Jan. 23, 2019, 12:27 a.m.
On Thu, Jan 17, 2019 at 9:14 AM Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> /* Skip the channels which are masked */
> if ((d->dma_channel_mask) & BIT(pch))
>         continue;

Per the discussion w/ Vinod and Rob, I think I'll leave this bit be,
so we use the channels in the bitmask.

> PS: Use BIT() macro where applicable.

But this suggestions I've integrated for v5.

Thanks so much for the review!
-john

Patch

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index b2060bf..ed19b1f 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -111,6 +111,7 @@  struct k3_dma_dev {
 	struct dma_pool		*pool;
 	u32			dma_channels;
 	u32			dma_requests;
+	u32			dma_channel_mask;
 	unsigned int		irq;
 };
 
@@ -318,6 +319,9 @@  static void k3_dma_tasklet(unsigned long arg)
 	/* check new channel request in d->chan_pending */
 	spin_lock_irq(&d->lock);
 	for (pch = 0; pch < d->dma_channels; pch++) {
+		if (!(d->dma_channel_mask & (1<<pch)))
+			continue;
+
 		p = &d->phy[pch];
 
 		if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
@@ -335,6 +339,9 @@  static void k3_dma_tasklet(unsigned long arg)
 	spin_unlock_irq(&d->lock);
 
 	for (pch = 0; pch < d->dma_channels; pch++) {
+		if (!(d->dma_channel_mask & (1<<pch)))
+			continue;
+
 		if (pch_alloc & (1 << pch)) {
 			p = &d->phy[pch];
 			c = p->vchan;
@@ -855,6 +862,13 @@  static int k3_dma_probe(struct platform_device *op)
 				"dma-channels", &d->dma_channels);
 		of_property_read_u32((&op->dev)->of_node,
 				"dma-requests", &d->dma_requests);
+		ret = of_property_read_u32((&op->dev)->of_node,
+				"dma-channel-mask", &d->dma_channel_mask);
+		if (ret) {
+			dev_warn(&op->dev,
+				 "dma-channel-mask doesn't exist, considering all as available.\n");
+			d->dma_channel_mask = (u32)~0UL;
+		}
 	}
 
 	if (!(soc_data->flags & K3_FLAG_NOCLK)) {
@@ -886,8 +900,12 @@  static int k3_dma_probe(struct platform_device *op)
 		return -ENOMEM;
 
 	for (i = 0; i < d->dma_channels; i++) {
-		struct k3_dma_phy *p = &d->phy[i];
+		struct k3_dma_phy *p;
+
+		if (!(d->dma_channel_mask & (1<<i)))
+			continue;
 
+		p = &d->phy[i];
 		p->idx = i;
 		p->base = d->base + i * 0x40;
 	}